Yоu're designing а GPU system thаt shоuld mаke full use оf the available memory bandwidth. System Setup: Memory bandwidth: 2 TB/s (HBM) Data format: TF8 (1 byte per element) The GPU has 32 SMs Each SM: Runs at 1 GHz Has 1 tensor core The input matrices are read directly from memory, and the output matrix is written directly back to memory. Assume there is no data reuse or caching. Program Info: Each warp has 32 threads Each tensor core performs matrix multiply on N × N square matrices Each matrix operation reads two N×N matrices and writes one N×N matrix→ That’s 3 × N² bytes per operation Each matrix operation finishes in 1 cycle, no matter the size Tensor cores and floating-point units run at the same time What is the smallest matrix size (N × N) required to saturate the 2 TB/s memory bandwidth?